Note: The introduction and background of this post were written in 2020 and only lightly edited since.

Introduction

At the start of my quest to get and decipher the Pentium II microcode, I found an image of a Pentium II etched down to bare silicon. It was plain to see that at least some trace of the microcode data was visible in these micrographs.

Intel Pentium II Deschutes microcode ROM, etched Microcode ROM area of Pentium II (Deschutes), 5x mag. (Fritzchens, 2017).

Initially I tried my luck at recovering the data with rompar, a ROM decoding tool that uses brightness thresholds (Laurie, 2019). This method did not work, as the resolution of the image was too low. Fritz very generously provided higher magnification scans of the relevant areas and from these images it became clear that simple brightness thresholds would not suffice here.

Intel Pentium II Deschutes microcode ROM, etched ROM area of Pentium II (Deschutes), 20x mag. (Fritzchens, 2020).

Background: The Pentium II ROM cell

At first glance there appear to be no less than four different types of cell in this image, however, this is an optimized version of MOS NOR ROM as described in (Skorobogatov, 2005), most similar to the example of a contact programmed array given there. The arrays in the Pentium II are not readily classified as metal, contact, or implant programmed: instead the entire transistor structure is omitted if a bit is not set.

As such the structure seen in the image can be understood as the outline of the active area: the die was etched to completion with glass etching cream - and as such only bare silicon was left. Fortunately, modern planar CMOS processes have shallow-trench insulation (STI), an oxide barrier around each transistor directly grown from the substrate. When everything is etched away, the active areas of each transistor remain as raised islands.

As a further optimization the contacts of neighbouring rows are merged and this creates the four-valued cell appearance. Since the publication of this research others have reverse engineered older Intel processors sharing this optimization (Shirriff, 2023) (Shirriff, 2025).

Structure of the Pentium II NOR ROM cell Structure of the Pentium II NOR ROM cell.

Cell classification algorithm

As the nature of this sample resulted in edge contrast only, any brightness threshold method would have to very accurately sample the edges of the contact tab, as the presence or absence of the contact itself only indicates that at least one of the neighbouring rows has that bit set. Instead, it can be observed that almost no relevant information is encoded in the direction along the gate of the cell. This eases processing significantly as that axis can be averaged away - reducing noise in the process. Then, this one dimensional “curve” can be compared to reference curves for the four possible two-cell states using a least-square fit.

The cell type classification scheme

To ease this process I developed a program around this algorithm: pladecode. This program is called PLAdecode as it gained features tailored towards full programmable logic array (PLA) decoding very early in its development.

The design of PLAdecode

When trying rompar I found that using it with stitched optical micrographs was difficult as the tool expected a tidy orthogonal grid of cells, and that was exacerbated by the simple UX which did not allow to easily correct cell positions once assigned. Furthermore, the large multipartite microcode ROM seen in the Pentium II would benefit from a hierarchical representation of the data, which rompar also did not support.

As a result PLAdecode was designed around three core principles: 1) all data should be inspectable and mutable. 2) a data structure matching the inherent hierarchy of the chip. 3) a workflow that combines the strengths of the human operator and the classifier algorithm.

This is implemented in a workflow where the user first declares one or more planes, representing logical arrays contained in a rectangular region of the image. In the case of a ROM this can be part of, or the whole ROM. For PLAs there will need to be at least one OR and one AND plane defined.

Part of the microcode ROM, divided into two planes Part of the microcode ROM, divided into two planes.

Once a plane is defined it can be activated, which restricts the image view to the its bounds. Within the plane each contiguous grid of cells is represented by a group. These groups are defined as a specific region of both the source image and of the logical bits in the plane.

The groups contained in one of the planes, and the settings for one of the groups The groups contained in one of the planes, and the settings for one of the groups.

Within the group the user can then manually tag cells, and the average of these cells will be used as the reference curves for automatic classification. Once a reference curve has been defined for each cell class (state), the other cells will continuously update with computed values. To ease correct transcription of an array the program allows marking cells as verified, locking its value from further updates. Manually marked cells can also be excluded from the reference computation, which allows correcting unclear data without affecting the reference data quality.

As it is often the case that groups within a plane are roughly identical in shape, size and image contrast, the program also supports saving a group’s properties and computed reference data to a group template. These can then be shared across a plane’s groups, easing transcription.

Besides the core functionality of capturing a mask programmed ROM’s cell values, the program also directly supports generating a C program stub that allows evaluating the array’s output for various inputs.

For the Pentium II project I have successfully transcribed some 78 kiB of mask ROM and 6 large PLAs, with only a few hundreds of manual corrections needed.

The source code is available on GitHub.

Please understand that this program was written for use in the microcode project and was not initially planned to be released, as such, the code might not be the best quality. Early development started as a fork of rompar (Laurie, 2019) and while almost all of the rompar code was replaced, some small part might remain.

References

  1. Fritzchens, F. (2017). Intel Pentium II - Deschutes. https://flic.kr/p/ZW9TDh
  2. Laurie, A. et al. (2019). rompar - Masked ROM optical data extraction tool. https://github.com/AdamLaurie/rompar
  3. Fritzchens, F. (2020). Intel Pentium II - Deschutes close up images. private communication.
  4. Skorobogatov, S. P. (2005). Semi-invasive attacks – A new approach to hardware security analysis (No. UCAM-CL-TR-630; Issue UCAM-CL-TR-630). University of Cambridge, Computer Laboratory. https://doi.org/10.48456/tr-630
  5. Shirriff, K. (2023). The Group Decode ROM: The 8086 processor’s first step of instruction decoding. https://www.righto.com/2023/05/8086-processor-group-decode-rom.html
  6. Shirriff, K. (2025). Notes on the Pentium’s microcode circuitry. https://www.righto.com/2025/03/pentium-microcde-rom-circuitry.html